Home
last modified time | relevance | path

Searched refs:CGTS_CU5_SP1_CTRL_REG__SP11_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9871 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK 0x7f0000 macro
H A Dgfx_8_0_sh_mask.h11595 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK 0x7f0000 macro
H A Dgfx_8_1_sh_mask.h11993 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK 0x7f0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24378 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK … macro
H A Dgc_9_1_sh_mask.h25794 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK … macro
H A Dgc_9_2_1_sh_mask.h25925 #define CGTS_CU5_SP1_CTRL_REG__SP11_MASK … macro