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Searched refs:CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9931 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK 0x7f0000 macro
H A Dgfx_8_0_sh_mask.h11655 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK 0x7f0000 macro
H A Dgfx_8_1_sh_mask.h12053 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK 0x7f0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24441 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK … macro
H A Dgc_9_1_sh_mask.h25857 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK … macro
H A Dgc_9_2_1_sh_mask.h25988 #define CGTS_CU6_LDS_SQ_CTRL_REG__SQ_MASK … macro