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Searched refs:CGTS_CU9_SP1_CTRL_REG__SP10_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h10231 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK 0x7f macro
H A Dgfx_8_0_sh_mask.h11955 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK 0x7f macro
H A Dgfx_8_1_sh_mask.h12353 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK 0x7f macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24773 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK … macro
H A Dgc_9_1_sh_mask.h26189 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK … macro
H A Dgc_9_2_1_sh_mask.h26320 #define CGTS_CU9_SP1_CTRL_REG__SP10_MASK … macro