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Searched refs:CG_CGLS_TILE_8 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcypress_dpm.c136 WREG32_CG(CG_CGLS_TILE_8, 0xFFFFFFFF); in cypress_gfx_clock_gating_enable()
163 WREG32_CG(CG_CGLS_TILE_8, 0); in cypress_gfx_clock_gating_enable()
H A Devergreend.h247 #define CG_CGLS_TILE_8 0x28 macro