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Searched refs:CHV_CMN_DW14 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_display.c1450 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)); in _chv_enable_pll()
1452 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), tmp); in _chv_enable_pll()
1642 val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)); in chv_disable_pll()
1644 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), val); in chv_disable_pll()
6766 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), in chv_prepare_pll()
6767 vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)) | in chv_prepare_pll()
H A Di915_reg.h1714 #define CHV_CMN_DW14(ch) _PIPE(ch, _CHV_CMN_DW14_CH0, _CHV_CMN_DW1_CH1) macro