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Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h354 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x00001000L macro
H A Dbif_4_1_sh_mask.h247 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000 macro
H A Dbif_5_0_sh_mask.h285 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000 macro
H A Dbif_5_1_sh_mask.h251 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h117756 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK … macro
H A Dnbio_6_1_sh_mask.h17506 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK … macro