Home
last modified time | relevance | path

Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h369 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT 0x00000007 macro
H A Dbif_4_1_sh_mask.h238 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT 0x7 macro
H A Dbif_5_0_sh_mask.h276 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT 0x7 macro
H A Dbif_5_1_sh_mask.h242 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT 0x7 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h2293 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h117738 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT … macro
H A Dnbio_6_1_sh_mask.h17488 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN2__SHIFT … macro