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Searched refs:CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2036 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
H A Dgfx_8_0_sh_mask.h2568 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
H A Dgfx_8_1_sh_mask.h3090 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h522 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_1_sh_mask.h520 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h509 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro