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Searched refs:CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h1342 #define CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h1864 #define CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10417 #define CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT macro
H A Dgc_9_1_sh_mask.h12023 #define CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT macro
H A Dgc_9_2_1_sh_mask.h11830 #define CP_CPC_MGCG_SYNC_CNTL__COOLDOWN_PERIOD__SHIFT macro