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Searched refs:CP_CPC_STATUS__ROQ1_BUSY_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1993 #define CP_CPC_STATUS__ROQ1_BUSY_MASK 0x40 macro
H A Dgfx_8_0_sh_mask.h2527 #define CP_CPC_STATUS__ROQ1_BUSY_MASK 0x40 macro
H A Dgfx_8_1_sh_mask.h3049 #define CP_CPC_STATUS__ROQ1_BUSY_MASK 0x40 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h500 #define CP_CPC_STATUS__ROQ1_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h498 #define CP_CPC_STATUS__ROQ1_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h487 #define CP_CPC_STATUS__ROQ1_BUSY_MASK … macro