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Searched refs:CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4118 #define CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT 0x1d macro
H A Dgfx_8_1_sh_mask.h4640 #define CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT 0x1d macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12959 #define CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT … macro
H A Dgc_9_1_sh_mask.h14388 #define CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14253 #define CP_HQD_EOP_CONTROL__SIG_SEM_RESULT__SHIFT … macro