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Searched refs:CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4157 #define CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK 0x3f0 macro
H A Dgfx_8_1_sh_mask.h4679 #define CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK 0x3f0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13025 #define CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h14454 #define CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h14319 #define CP_HQD_GDS_RESOURCE_STATE__GWS_SIZE_MASK … macro