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Searched refs:CP_HQD_HQ_STATUS1__STATUS_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4093 #define CP_HQD_HQ_STATUS1__STATUS_MASK 0xffffffff macro
H A Dgfx_8_1_sh_mask.h4615 #define CP_HQD_HQ_STATUS1__STATUS_MASK 0xffffffff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12939 #define CP_HQD_HQ_STATUS1__STATUS_MASK … macro
H A Dgc_9_1_sh_mask.h14368 #define CP_HQD_HQ_STATUS1__STATUS_MASK … macro
H A Dgc_9_2_1_sh_mask.h14233 #define CP_HQD_HQ_STATUS1__STATUS_MASK … macro