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Searched refs:CP_HQD_HQ_STATUS1__STATUS__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4094 #define CP_HQD_HQ_STATUS1__STATUS__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4616 #define CP_HQD_HQ_STATUS1__STATUS__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12938 #define CP_HQD_HQ_STATUS1__STATUS__SHIFT macro
H A Dgc_9_1_sh_mask.h14367 #define CP_HQD_HQ_STATUS1__STATUS__SHIFT macro
H A Dgc_9_2_1_sh_mask.h14232 #define CP_HQD_HQ_STATUS1__STATUS__SHIFT macro