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Searched refs:CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3357 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK 0x20000000 macro
H A Dgfx_8_0_sh_mask.h3973 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK 0x20000000 macro
H A Dgfx_8_1_sh_mask.h4495 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK 0x20000000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12792 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK … macro
H A Dgc_9_1_sh_mask.h14221 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK … macro
H A Dgc_9_2_1_sh_mask.h14086 #define CP_HQD_PQ_CONTROL__ROQ_PQ_IB_FLIP_MASK … macro