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Searched refs:CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2350 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK 0x40000000L macro
H A Dgfx_7_2_sh_mask.h1167 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK 0x40000000 macro
H A Dgfx_8_0_sh_mask.h1489 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK 0x40000000 macro
H A Dgfx_8_1_sh_mask.h2013 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK 0x40000000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10655 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12261 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12065 #define CP_INT_CNTL__GENERIC1_INT_ENABLE_MASK … macro