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Searched refs:CP_MEM_SLP_CNTL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dsid.h1295 #define CP_MEM_SLP_CNTL 0xC1E4 macro
H A Dcikd.h1350 #define CP_MEM_SLP_CNTL 0xC1E4 macro
H A Dsi.c5393 orig = data = RREG32(CP_MEM_SLP_CNTL); in si_enable_mgcg()
5396 WREG32(CP_MEM_SLP_CNTL, data); in si_enable_mgcg()
5417 data = RREG32(CP_MEM_SLP_CNTL); in si_enable_mgcg()
5420 WREG32(CP_MEM_SLP_CNTL, data); in si_enable_mgcg()
H A Dcik.c6075 orig = data = RREG32(CP_MEM_SLP_CNTL); in cik_enable_mgcg()
6078 WREG32(CP_MEM_SLP_CNTL, data); in cik_enable_mgcg()
6127 data = RREG32(CP_MEM_SLP_CNTL); in cik_enable_mgcg()
6130 WREG32(CP_MEM_SLP_CNTL, data); in cik_enable_mgcg()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v8_0.c5900 WREG32_FIELD(CP_MEM_SLP_CNTL, CP_MEM_LS_EN, 1); in gfx_v8_0_update_medium_grain_clock_gating()