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Searched refs:CP_MEM_SLP_CNTL__RESERVED__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2607 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x00000002 macro
H A Dgfx_7_2_sh_mask.h1440 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2 macro
H A Dgfx_8_0_sh_mask.h1884 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h2406 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11083 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_1_sh_mask.h12689 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12487 #define CP_MEM_SLP_CNTL__RESERVED__SHIFT … macro