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Searched refs:CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2672 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0x000000f0L macro
H A Dgfx_7_2_sh_mask.h3237 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
H A Dgfx_8_0_sh_mask.h3857 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
H A Dgfx_8_1_sh_mask.h4379 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20968 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
H A Dgc_9_1_sh_mask.h22404 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
H A Dgc_9_2_1_sh_mask.h22343 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro