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Searched refs:CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2680 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x00000002L macro
H A Dgfx_7_2_sh_mask.h2773 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
H A Dgfx_8_0_sh_mask.h3343 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
H A Dgfx_8_1_sh_mask.h3865 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19436 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK macro
H A Dgc_9_1_sh_mask.h20872 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK macro
H A Dgc_9_2_1_sh_mask.h20799 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK macro