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Searched refs:CP_RB_VMID__RB2_VMID__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2833 #define CP_RB_VMID__RB2_VMID__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h1376 #define CP_RB_VMID__RB2_VMID__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h1740 #define CP_RB_VMID__RB2_VMID__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h2264 #define CP_RB_VMID__RB2_VMID__SHIFT 0x10 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10743 #define CP_RB_VMID__RB2_VMID__SHIFT … macro
H A Dgc_9_1_sh_mask.h12349 #define CP_RB_VMID__RB2_VMID__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12153 #define CP_RB_VMID__RB2_VMID__SHIFT … macro