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Searched refs:CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2890 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK 0x000003ffL macro
H A Dgfx_7_2_sh_mask.h3177 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK 0x3ff macro
H A Dgfx_8_0_sh_mask.h3791 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK 0x3ff macro
H A Dgfx_8_1_sh_mask.h4313 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK 0x3ff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1189 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK … macro
H A Dgc_9_1_sh_mask.h1187 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK … macro
H A Dgc_9_2_1_sh_mask.h1154 #define CP_ROQ_IB1_STAT__ROQ_RPTR_INDIRECT1_MASK … macro