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Searched refs:CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2901 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h3176 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3790 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4312 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1183 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_1_sh_mask.h1181 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1148 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro