Searched refs:CS_SF (Results 1 – 1 of 1) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.h | 45 #define CS_SF(reg_name, field_name, post_fix)\ macro
49 CS_SF(PLL_CNTL, PLL_REF_DIV_SRC, mask_sh),\
50 CS_SF(PIXCLK1_RESYNC_CNTL, DCCG_DEEP_COLOR_CNTL1, mask_sh),\
51 CS_SF(PLL_POST_DIV, PLL_POST_DIV_PIXCLK, mask_sh),\
52 CS_SF(PLL_REF_DIV, PLL_REF_DIV, mask_sh)
55 CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_DCCG_DEEP_COLOR_CNTL, mask_sh),\
56 CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE, mask_sh)
76 CS_SF(DP_DTO0_PHASE, DP_DTO0_PHASE, mask_sh),\
77 CS_SF(DP_DTO0_MODULO, DP_DTO0_MODULO, mask_sh),\
78 CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_DCCG_DEEP_COLOR_CNTL, mask_sh),\
[all …]
|