Home
last modified time | relevance | path

Searched refs:DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3549 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h3784 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h4510 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h5034 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22110 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_1_sh_mask.h23546 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_2_1_sh_mask.h23541 #define DB_PERFCOUNTER0_SELECT__PERF_SEL__SHIFT macro