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Searched refs:DCFE_MEM_PWR_STATUS__LB0_ALPHA_MEM_PWR_STATE_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h497 #define DCFE_MEM_PWR_STATUS__LB0_ALPHA_MEM_PWR_STATE_MASK 0xc00 macro
H A Ddce_11_0_sh_mask.h14806 #define DCFE_MEM_PWR_STATUS__LB0_ALPHA_MEM_PWR_STATE_MASK 0xc00 macro
H A Ddce_11_2_sh_mask.h15440 #define DCFE_MEM_PWR_STATUS__LB0_ALPHA_MEM_PWR_STATE_MASK 0xc00 macro