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Searched refs:DCO_MEM_PWR_CTRL__HDMI3_MEM_PWR_DIS_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h15510 #define DCO_MEM_PWR_CTRL__HDMI3_MEM_PWR_DIS_MASK 0x400000 macro
H A Ddce_11_0_sh_mask.h15670 #define DCO_MEM_PWR_CTRL__HDMI3_MEM_PWR_DIS_MASK 0x400000 macro
H A Ddce_11_2_sh_mask.h16352 #define DCO_MEM_PWR_CTRL__HDMI3_MEM_PWR_DIS_MASK 0x400000 macro
H A Ddce_12_0_sh_mask.h8607 #define DCO_MEM_PWR_CTRL__HDMI3_MEM_PWR_DIS_MASK … macro