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Searched refs:DCO_POWER_MANAGEMENT_CNTL__PM_ASSERT_RESET__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h15625 #define DCO_POWER_MANAGEMENT_CNTL__PM_ASSERT_RESET__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h15835 #define DCO_POWER_MANAGEMENT_CNTL__PM_ASSERT_RESET__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h16565 #define DCO_POWER_MANAGEMENT_CNTL__PM_ASSERT_RESET__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h8673 #define DCO_POWER_MANAGEMENT_CNTL__PM_ASSERT_RESET__SHIFT … macro