Home
last modified time | relevance | path

Searched refs:DCP_GRPH_STEREOSYNC_FLIP_MODE_PHASE1 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h1939 DCP_GRPH_STEREOSYNC_FLIP_MODE_PHASE1 = 0x3, enumerator
H A Ddce_11_2_enum.h2402 DCP_GRPH_STEREOSYNC_FLIP_MODE_PHASE1 = 0x3, enumerator
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h5901 DCP_GRPH_STEREOSYNC_FLIP_MODE_PHASE1 = 0x00000003, enumerator