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Searched refs:DIDT_DBR_CTRL0__PHASE_OFFSET__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h20706 #define DIDT_DBR_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h21316 #define DIDT_DBR_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h29579 #define DIDT_DBR_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_9_1_sh_mask.h30906 #define DIDT_DBR_CTRL0__PHASE_OFFSET__SHIFT … macro