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Searched refs:DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_powertune.c145 … DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, …
287 … DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, …
429 … DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, …
572 … DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, …
755 … DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, …
H A Dvega10_powertune.c212 …L0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT, 0…
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h18274 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT 0x4 macro
H A Dgfx_8_0_sh_mask.h20492 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT 0x4 macro
H A Dgfx_8_1_sh_mask.h21094 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT 0x4 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28585 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT … macro
H A Dgc_9_1_sh_mask.h29931 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30253 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST__SHIFT … macro