Searched refs:DIDT_TCP_CTRL0__PHASE_OFFSET_MASK (Results 1 – 8 of 8) sorted by relevance
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | smu7_powertune.c | 230 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_… 372 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_… 514 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_… 659 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_… 844 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
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H A D | vega10_powertune.c | 235 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_TCP_CTRL0__PHASE_OF…
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_2_sh_mask.h | 18403 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
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H A D | gfx_8_0_sh_mask.h | 20651 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
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H A D | gfx_8_1_sh_mask.h | 21259 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_sh_mask.h | 29336 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
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H A D | gc_9_1_sh_mask.h | 30668 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
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H A D | gc_9_2_1_sh_mask.h | 30909 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
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