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Searched refs:DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dvega10_powertune.c559 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK, DIDT_T…
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h29227 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_1_sh_mask.h30564 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_2_1_sh_mask.h30850 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro