Searched refs:DISABLE_MEM_PWR_CTRL (Results 1 – 17 of 17) sorted by relevance
| /dragonfly/sys/dev/drm/amd/include/asic_reg/smu/ |
| H A D | smu_8_0_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | smu_7_1_2_enum.h | 1234 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | smu_7_1_3_enum.h | 1270 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/bif/ |
| H A D | bif_5_1_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | bif_5_0_enum.h | 1186 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/ |
| H A D | gmc_8_2_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | gmc_8_1_enum.h | 1186 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_6_0_enum.h | 1069 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | uvd_5_0_enum.h | 1199 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/oss/ |
| H A D | oss_3_0_1_enum.h | 1452 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | oss_3_0_enum.h | 1485 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/dce/ |
| H A D | dce_10_0_enum.h | 1761 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | dce_11_0_enum.h | 5628 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | dce_11_2_enum.h | 6266 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_0_enum.h | 6846 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| H A D | gfx_8_1_enum.h | 6796 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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| /dragonfly/sys/dev/drm/amd/include/ |
| H A D | vega10_enum.h | 205 DISABLE_MEM_PWR_CTRL = 0x00000001, enumerator
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