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Searched refs:DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK1__DCI_PERFMON_COUNTER5_INT_MASK__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h8926 #define DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK1__DCI_PERFMON_COUNTER5_INT_MASK__SHIFT 0x5 macro
H A Ddce_10_0_sh_mask.h8134 #define DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK1__DCI_PERFMON_COUNTER5_INT_MASK__SHIFT 0x5 macro