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Searched refs:DPG_PIPE_LOW_POWER_CONTROL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_mem_input.h78 SRI(DPG_PIPE_LOW_POWER_CONTROL, DMIF_PG, id),\
111 uint32_t DPG_PIPE_LOW_POWER_CONTROL; member
223 SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_ENABLE, mask_sh),\
224 SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_URGENT_DURING_REQUEST, mask_sh),\
225 SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST, mask_sh),\
226 SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_WATERMARK, mask_sh)
H A Ddce_mem_input.c214 if (REG(DPG_PIPE_LOW_POWER_CONTROL)) { in program_nbp_watermark()
218 REG_UPDATE_3(DPG_PIPE_LOW_POWER_CONTROL, in program_nbp_watermark()
223 REG_UPDATE(DPG_PIPE_LOW_POWER_CONTROL, in program_nbp_watermark()