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Searched refs:DPIO_CH1 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_runtime_pm.c1065 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1066 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1067 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1087 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1096 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) && in assert_chv_phy_status()
1098 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1108 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1111 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1288 if (ch == DPIO_CH1 && val == 0) in assert_chv_phy_powergate()
2914 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1); in chv_phy_control_init()
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H A Dintel_dpio_phy.c164 [DPIO_CH1] = { .port = PORT_C },
251 port == phy_info->channel[DPIO_CH1].port) { in bxt_port_to_phy_channel()
253 *ch = DPIO_CH1; in bxt_port_to_phy_channel()
799 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
814 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
822 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
948 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
H A Dintel_drv.h1089 return DPIO_CH1; in vlv_dport_to_channel()
1117 return DPIO_CH1; in vlv_pipe_to_channel()
H A Di915_drv.h357 DPIO_CH1 enumerator