Searched refs:DPLL_CFGCR0_SSC_ENABLE (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/i915/ | ||
| H A D | intel_dpll_mgr.c | 2301 cfgcr0 = DPLL_CFGCR0_SSC_ENABLE; in cnl_ddi_dp_set_dpll_hw_state() |
| H A D | i915_reg.h | 8618 #define DPLL_CFGCR0_SSC_ENABLE (1 << 29) macro |