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Searched refs:DPLL_FPA01_P1_POST_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_display.c6862 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll()
6915 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll()
6920 dpll |= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll()
8217 dpll |= (1 << (crtc_state->dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in ironlake_compute_dpll()
10073 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
10100 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
10111 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in i9xx_crtc_clock_get()
14636 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) | in i830_enable_pipe()
H A Di915_reg.h3129 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro