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Searched refs:DPM_TABLE_130__GraphicsLevel_3_DeepSleepDivId__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_1_sh_mask.h1272 #define DPM_TABLE_130__GraphicsLevel_3_DeepSleepDivId__SHIFT 0x18 macro
H A Dsmu_7_1_0_sh_mask.h1274 #define DPM_TABLE_130__GraphicsLevel_3_DeepSleepDivId__SHIFT 0x18 macro
H A Dsmu_7_1_2_sh_mask.h1514 #define DPM_TABLE_130__GraphicsLevel_3_DeepSleepDivId__SHIFT 0x10 macro
H A Dsmu_7_1_3_sh_mask.h1932 #define DPM_TABLE_130__GraphicsLevel_3_DeepSleepDivId__SHIFT 0x10 macro