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Searched refs:DPM_TABLE_36__VddcLevel_0_StdVoltageHiSidd__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_1_sh_mask.h1534 #define DPM_TABLE_36__VddcLevel_0_StdVoltageHiSidd__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h888 #define DPM_TABLE_36__VddcLevel_0_StdVoltageHiSidd__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h888 #define DPM_TABLE_36__VddcLevel_0_StdVoltageHiSidd__SHIFT 0x0 macro