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Searched refs:DPM_TABLE_86__GraphicsLevel_0_DisplayWatermark_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_1_sh_mask.h1103 #define DPM_TABLE_86__GraphicsLevel_0_DisplayWatermark_MASK 0xff0000 macro
H A Dsmu_7_1_0_sh_mask.h1105 #define DPM_TABLE_86__GraphicsLevel_0_DisplayWatermark_MASK 0xff0000 macro