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Searched refs:EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h2177 #define EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h117206 #define EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__SHIFT … macro
H A Dnbio_6_1_sh_mask.h16958 #define EP_PCIE_F0_DPA_CAP__TRANS_LAT_VAL_0__SHIFT … macro