Searched refs:FUS_MC_VM_MD_L1_TLB2_CNTL (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/radeon/ | ||
| H A D | evergreend.h | 971 #define FUS_MC_VM_MD_L1_TLB2_CNTL 0x2664 macro |
| H A D | evergreen.c | 2405 WREG32(FUS_MC_VM_MD_L1_TLB2_CNTL, tmp); in evergreen_pcie_gart_enable() |