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Searched refs:GDS_PS0_CTXSW_CNT2__UPDN_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h17463 #define GDS_PS0_CTXSW_CNT2__UPDN_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h18051 #define GDS_PS0_CTXSW_CNT2__UPDN_MASK 0xffff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13957 #define GDS_PS0_CTXSW_CNT2__UPDN_MASK … macro
H A Dgc_9_1_sh_mask.h15389 #define GDS_PS0_CTXSW_CNT2__UPDN_MASK … macro
H A Dgc_9_2_1_sh_mask.h15251 #define GDS_PS0_CTXSW_CNT2__UPDN_MASK … macro