Home
last modified time | relevance | path

Searched refs:GDS_VMID10_BASE__BASE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h15042 #define GDS_VMID10_BASE__BASE__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h17002 #define GDS_VMID10_BASE__BASE__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h17590 #define GDS_VMID10_BASE__BASE__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13497 #define GDS_VMID10_BASE__BASE__SHIFT macro
H A Dgc_9_1_sh_mask.h14929 #define GDS_VMID10_BASE__BASE__SHIFT macro
H A Dgc_9_2_1_sh_mask.h14787 #define GDS_VMID10_BASE__BASE__SHIFT macro