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Searched refs:GEN7_L3BANK2X_CLOCK_GATE_DISABLE (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Di915_reg.h7830 #define GEN7_L3BANK2X_CLOCK_GATE_DISABLE (1<<25) macro
H A Dintel_pm.c8825 I915_READ(GEN7_UCGCTL4) | GEN7_L3BANK2X_CLOCK_GATE_DISABLE); in vlv_init_clock_gating()