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Searched refs:GEN8_L3SQCREG1 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_engine_cs.c1257 u32 val = I915_READ(GEN8_L3SQCREG1); in bxt_init_workarounds()
1260 I915_WRITE(GEN8_L3SQCREG1, val); in bxt_init_workarounds()
H A Dintel_pm.c8491 val = I915_READ(GEN8_L3SQCREG1); in gen8_set_l3sqc_credits()
8495 I915_WRITE(GEN8_L3SQCREG1, val); in gen8_set_l3sqc_credits()
8501 POSTING_READ(GEN8_L3SQCREG1); in gen8_set_l3sqc_credits()
H A Di915_reg.h7035 #define GEN8_L3SQCREG1 _MMIO(0xB100) macro