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Searched refs:GPU_HDP_FLUSH_DONE (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v2_4.c277 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v2_4_ring_emit_hdp_flush()
279 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v2_4_ring_emit_hdp_flush()
H A Dsdma_v3_0.c452 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v3_0_ring_emit_hdp_flush()
454 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v3_0_ring_emit_hdp_flush()
/dragonfly/sys/dev/drm/radeon/
H A Dcik_sdma.c181 radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); in cik_sdma_hdp_flush_ring_emit()
H A Dcikd.h849 #define GPU_HDP_FLUSH_DONE 0x54E0 macro
H A Dcik.c3565 radeon_ring_write(ring, GPU_HDP_FLUSH_DONE >> 2); in cik_hdp_flush_cp_ring_emit()