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Searched refs:GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h4821 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h5234 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h6020 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6554 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20331 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT … macro
H A Dgc_9_1_sh_mask.h21767 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h21706 #define GRBM_SE0_PERFCOUNTER_HI__PERFCOUNTER_HI__SHIFT … macro